RISC-V

 RISC-V
(pronounced "risk-five"[1])
an open standard instruction set architecture (ISA) based on established reduced instruction set computer (RISC) principles.

Instruction Set Architecture (ISA)
instruction set architecture (ISA) - is a set of instruction that exist between the software (the program [application - apps] -- like a game, a web browser, a communication program) and the hardware (like the computing gaming machine, the phone computer, the laptop computer);  the instruction set is invisible from the end-users perspective.  

Reduced Instruction Set Computer (RISC) principles
reduced instruction set computer (RISC) principles - is a design principles where rather than having a highly specialized set of complex computer instruction (CISC - complex instruction set computer principles), the design principles favor a reduced set of small, highly optimized set of instructions.  

RISC-V ISA [instruction set] is provided under open source licenses that do not require fees to use.
A number of companies are offering or have announced RISC-V hardware, open source operating systems with RISC-V support are available and the instruction set is supported in several popular software toolchains.

RISC-V was started with a goal to make a practical ISA [instruction set] that was open-sourced, usable academically, and deployable in any hardware or software design without royalties.[1][9] Also, justifying rationales for each design decision of the project are explained, at least in broad terms. The RISC-V authors are academics that have substantial experience in computer design, and the RISC-V ISA is a direct development from a series of academic computer-design projects. It was originated in part to aid such projects.[1][9]

In order to build a large, continuing community of users and therefore accumulate designs and software, the RISC-V ISA designers intentionally support a wide variety of practical use cases: compact, performance, and low-power real-world implementations[1][10] without over-architecting for a particular microarchitecture.[1][11][12][13] The requirements of a large base of contributors is part of the reason why RISC-V was engineered to address many possible uses.

The designers primary assertion is that the instruction set is the key interface in a computer as it is situated at the interface between the hardware and the software. If a good instruction set were open and available for use by all, then it can dramatically reduce the cost of software by enabling far more reuse. It should also trigger increased competition among hardware providers, who can then devote more resources toward design and less for software support.[9]

The designers maintain that new principles are becoming rare in instruction set design, as the most successful designs of the last forty years have grown increasingly similar. Of those that failed, most did so because their sponsoring companies were financially unsuccessful, not because the instruction sets were technically poor. Thus, a well-designed open instruction set designed using well-established principles should attract long-term support by many vendors.[9]

RISC-V also encourages academic usage. The simplicity of the integer subset permits basic student exercises, and is a simple enough ISA to enable software to control research machines. The variable-length ISA provides extensions for both student exercises and research,[1] and the separated privileged instruction set permits research in operating system support without redesigning compilers.[14] RISC-V's open intellectual property paradigm allows derivative designs to be published, reused, and modified.[1]

source:
       https://en.wikipedia.org/wiki/RISC-V